Flash memory is a non-volatile computer storage technology that can be electrically erased and reprogrammed. Flash memory is typically written in blocks and allocated, garbage collected and erased in larger super blocks or S-Blocks.
Flash memory comprises a plurality of cells, with each cell being configured to store one, two or more bits per cell. SLC is an abbreviation of “Single-Level Cell”, which denotes a configuration in which each cell stores one bit. SLC is characterized not only by fast transfer speeds, low power consumption and high cell endurance, but also by relatively high cost. MLC is an abbreviation of “Multi-level Cell”, which denotes a configuration in which each cell stores two or more bits per cell. The acronym MLC is often used to denote a Flash memory having cells that store two bits per cell. That same acronym MLC is also used, however, to designated Flash memory having cells configured to store three bits per cell (also called “TLC” or Triple or Three Level Cell) or even a greater number of bits per cell. When MLC is used to designate a memory that stores two bits in each cell, such an MLC Flash memory may be characterized by somewhat slower transfer speeds, higher power consumption and lower cell endurance than a Single-Level Cell memory. Such MLC memories, however, enjoy a comparatively lower manufacturing cost per bit than do SLC memories.
In MLC NAND Flash memory, the same physical page of memory cells may be used to store two or more logical pages of data, with each cell being configured to store 2 or more bits. When two bits per cell are stored, a first bit of a lower page is stored first, and then the next bit or bits of one or more higher-order pages are stored. The lower page is programmed first, followed by the higher-order page or pages. When programming the upper page, programming voltages are applied to the same cells that already store valid data in the lower page. Should power fail during the programming of the higher-order page or pages, the stored data in the lower page may be irrecoverably corrupted, as may be the data intended to be stored in the higher-order page or pages. This problem is compounded by the fact that the host may have already received an acknowledgment from the data storage device indicating that the data stored in the lower page has already been saved to the Flash memory.
FIG. 1 is a block diagram of aspects of conventional Flash data storage device. As shown therein, the Flash data storage device 100 comprises a controller 104. The controller 104 is coupled to an array of non-volatile memory (e.g., Flash memory devices), collectively referenced at numeral 102. Conventionally, to provide power-fail protection, conventional Flash data storage devices include a backup power source, as shown at 106 in FIG. 1. As indicated at 106, super-capacitors or an array of discrete capacitors are conventionally used to maintain the controller 104 and the non-volatile memory 102 powered-up during a power loss, typically only long enough to finish programming the data to the Flash memory devices 102. Indeed, these super-capacitors or array of discrete capacitors are configured to store a sufficiently large amount of energy to enable the controller 104 to complete any firmware operation (such as a write operation) upon power loss. This is not optimal, however, because super-capacitors are large, unreliable, prone to problems and expensive.